Contents |
Page |
|||
1 |
1 |
||
1.1 |
Brief History of computing |
2 |
|
1.2 |
Technological Developments |
3 |
|
1.3 |
FPGA Technology |
4 |
|
1.4 |
Choice of Processor |
4 |
|
2 |
6 |
||
2.1 |
Processor Overview |
7 |
|
2.2 |
Processor Specification |
8 |
|
2.3 |
Basic Instruction Set |
10 |
|
2.4 |
Microcoded Instructions |
12 |
|
3 |
14 |
||
3.1 |
Data path Changes |
15 |
|
3.2 |
State Model |
16 |
|
3.3 |
Data path Complexity |
16 |
|
3.4 |
Implementation Choices |
17 |
|
3.5 |
Registers |
18 |
|
3.6 |
Removed Items |
18 |
|
3.7 |
State Model Refinement |
19 |
|
3.8 |
Initial Data Path |
21 |
|
3.9 |
Program Counter |
24 |
|
3.10 |
Output Requirements |
25 |
|
3.11 |
Final State Diagram |
25 |
|
3.12 |
Variable Execution Time |
26 |
|
3.13 |
Microcoded Instruction Mapping |
27 |
|
3.14 |
Final Data Path |
28 |
|
3.15 |
Signal to State Assignment |
29 |
|
3.16 |
VHDL Coding |
30 |
|
3.17 |
VHDL to Gates |
33 |
|
3.18 |
Xilinx Generation |
33 |
|
4 |
34 |
||
4.1 |
Testing Strategy |
35 |
|
4.2 |
First Test Program |
36 |
|
4.3 |
Detailed Testing |
38 |
|
4.4 |
Xilinx Testing |
38 |
|
4.5 |
Performance Increase, Power Decrease |
40 |
|
5 |
41 |
||
5.1 |
42 |
||
6 |
44 |
||
7 |
46 |
||